The present invention relates to a semiconductor design technology, and more particularly, to a semiconductor device capable of preventing a voltage level of a pad which is not used in a wafer burn-in test mode operation from being floated.
Generally, a semiconductor device uses a method of performing an objective operation through an operation of receiving or outputting a plurality of electric signals which swing within a predetermined range of a voltage level.
At this time, the plurality of electric signals which swing within the predetermined range of a voltage level may be a power supply voltage or an internal voltage fixed to a particular voltage level for operating an internal circuit of the semiconductor device in an analog aspect, or may be a logic signal classified into a logic high level or a logic low level according to a particular voltage level for operating the internal circuit of the semiconductor device digitally.
However, when the semiconductor device performs the objective operation by using the electric signal, a noise or a spark is generated in the used electric signal for unaccountable reason and thus an error may occur preventing the semiconductor device from normally performing the objective operation.
Besides, when a power-up operation is performed by initially supplying a power to the semiconductor device, a voltage level or a logic level of an internally used electric signal may not have a target value.
To solve these problems, the semiconductor device has been provided with a reset circuit inside the semiconductor device for resetting a voltage level or a logic level of an internally used electric signal.
That is, when the power-up operation is performed by initially supplying a power to the semiconductor device and also when an abnormal operation due to the noise or spark generated in the semiconductor device is detected, the reset circuit included in the semiconductor device makes the semiconductor device normally perform an operation by resetting an electric signal used in the semiconductor device.
At this time, an activation period of an operation of the reset circuit included in the semiconductor device is defined through a Mode Register Set (MRS) or is determined according to a reset signal. For instance, in an activation period of the reset signal, the reset circuit is operated so that a plurality of internal circuits included in the semiconductor device are initialized.
In this manner, a designer could prevent the semiconductor device from being abnormally operated by appropriately adjusting a period and timing of an activation of the reset signal defined by the MRS at the step of designing the semiconductor device.
However, when the semiconductor device is operated, the semiconductor device may be abnormally operated for an unpredictable reason in unpredictable circumstances. In this case, the reset signal defined by the MRS cannot be properly activated, and as a result, the abnormal operation of the semiconductor device may not be prevented.
Therefore, the semiconductor device according to the related art is additionally provided with an exclusive pad for receiving the reset signal externally (e.g., from the outside of the semiconductor device) besides defining the reset signal in the MRS in order to define the activation period of the reset signal, whereby the semiconductor device can be initialized whenever it is detected that the semiconductor device is abnormally operated.
FIG. 1 is a block diagram depicting a system for defining a reset signal according to a conventional semiconductor device.
Referring to FIG. 1, the conventional semiconductor device is additionally provided with an exclusive pad, i.e., a reset input pad 100, for receiving an external reset signal OUT_RESETb as well as defining an MRS reset signal MRS_RESETb in an MRS 120 in order to define an activation period of an internal reset signal RESETb.
To be specific, the related semiconductor device includes the reset input pad 100 for receiving the external reset signal OUT_RESETb from the outside; a reset input buffer 110 for receiving and buffering the external reset signal OUT_RESETb inputted from the reset input pad 100 and for outputting the buffered signal as a buffered reset signal BUF_OUT_RESETb; a plurality of internal circuits 150_1 to 150_N for respectively performing predetermined internal operations; a reset unit 140 for resetting the plurality of internal circuits 150_1 to 150_N by controlling an activation of the internal reset signal RESETb in response to a power-up signal POWER_UPb, the MRS reset signal MRS_RESETb defined in the MRS 120 and the buffered reset signal BUF_OUT_RESETb outputted through the reset input buffer 110.
Based on the above-described structure, an operation of defining the internal reset signal RESETb for resetting the plurality of internal circuits 150_1 to 150_N included in the related semiconductor device is described as follows.
First, when the MRS reset signal MRS_RESETb defined in the MRS 120 is activated, the buffered reset signal BUF_OUT_RESETb inputted from the outside through the reset input pad 100 and reset input buffer 110 is activated, and also the power-up signal POWER_UPb is activated, the reset unit 140 activates the internal reset signal RESETb and the plurality of internal circuits 150_1 to 150_N are initialized when the internal reset signal RESETb is activated.
At this time, the MRS reset signal MRS_RESETb defined in the MRS 120 can be activated under predictable abnormal circumstances, i.e., circumstances in which the plurality of internal circuits 150_1 to 150_N should be initialized, e.g., when it is detected that some of the plurality of internal circuits 150_1 to 150_N are abnormally operated or in case of escaping from an operation mode in which the power supplied to partial internal circuits among the plurality of internal circuits 150_1 to 150_N is cut-off while the semiconductor device is operated in, e.g., a power-down mode.
The buffered reset signal BUF_OUT_RESETb inputted from the outside through the reset input pad 100 and the reset input buffer 110 can be activated by a user anytime at the step of actually using the semiconductor device.
Also, the power-up signal POWER_UPb can be activated when the semiconductor device is initially supplied with the power.
As above-mentioned, the related semiconductor device performs an operation of activating the internal reset signal RESETb at proper timings for various situations. Through this operation, the semiconductor device can be initialized at proper timings in various cases so that the semiconductor device may be operated stably.
Meanwhile, generally, the semiconductor device is mass-produced through very complicated and difficult processes. As a matter of course, while the semiconductor device is mass-produced, a defective semiconductor device, which cannot be operated for the original purpose, is always manufactured because of variations of the manufacturing process.
Although the semiconductor device which cannot be operated for the original purpose like this should be distinguished from the normally operated semiconductor device, it is not easy to determine whether the semiconductor device is normally operated or not since the semiconductor device is generally small-sized and highly integrated. Therefore, generally, a company which mass-produces semiconductor devices tests the mass-produced semiconductor devices in multiple steps. When a semiconductor device passes all the tests, it is classified as a normal semiconductor device.
For this reason, there are various test processes in the manufacturing process of the semiconductor device. At this time, the semiconductor device produced through the manufacturing process undergoes a test in a wafer state, and this test is called a wafer burn-in test. Unlike a packaged state, in the wafer state of a semiconductor device, while there are a plurality of pads for receiving the electric signal, they are not accompanied by pins capable of directly supplying the electric signal to the plurality of pads. Therefore, in order to normally perform the wafer burn-in test, test equipment for the wafer burn-in test capable of supplying the electric signal to the plurality of pads included in the semiconductor device is needed.
That is, the wafer burn-in test can be normally performed by directly supplying the electric to the plurality of pads included in the semiconductor device through a plurality of probes included in the test equipment.
At this time, while the number of the probes included in the test equipment is fixed, the number of pads included in the semiconductor device is variable according to design needs. Therefore, generally, when the wafer burn-in test is performed, only predetermined pads among the plurality of pads included in the semiconductor device are connected to probes supplied with the electric signal. The other pads are not connected from the probes and thus no electric signals are supplied to them.
However, the predetermined pads among the plurality of pads may be relatively close to the other pads. No matter how precisely the electric signal are supplied to the predetermined pads location-wise, the neighboring other pads may also be supplied with a significant amount of the electric signal and thus a result of the wafer burn-in test may be inaccurate. Therefore, even a normal semiconductor device may be classified as a defective semiconductor device.
Particularly, in case of resetting the whole semiconductor device in response to the external reset signal OUT_RESETb inputted from the outside through the reset input pad 100 such as the semiconductor device shown in FIG. 1, because of the external reset signal OUT_RESETb inputted with a wrong logic level from the outside of the semiconductor through the reset input pad 100, a problem of incorrectly resetting the semiconductor device may occur.